reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
17256 { 4340 /* sm3partw1 */, AArch64::SM3PARTW1, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, 17257 { 4350 /* sm3partw2 */, AArch64::SM3PARTW2, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, 17258 { 4360 /* sm3ss1 */, AArch64::SM3SS1, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorReg1281_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, 17259 { 4367 /* sm3tt1a */, AArch64::SM3TT1A, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, }, 17260 { 4375 /* sm3tt1b */, AArch64::SM3TT1B, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, }, 17261 { 4383 /* sm3tt2a */, AArch64::SM3TT2A, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, }, 17262 { 4391 /* sm3tt2b */, AArch64::SM3TT2B, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, }, 17264 { 4399 /* sm4e */, AArch64::SM4E, Convert__VectorReg1281_0__VectorReg1281_2__Tie0_1_1, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, 17266 { 4404 /* sm4ekey */, AArch64::SM4ENCKEY, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, 24614 { 4340 /* sm3partw1 */, AArch64::SM3PARTW1, Convert__imm_95_0__Tie0_1_1__imm_95_0__imm_95_0, AMFBS_HasSM4, { }, }, 24615 { 4350 /* sm3partw2 */, AArch64::SM3PARTW2, Convert__imm_95_0__Tie0_1_1__imm_95_0__imm_95_0, AMFBS_HasSM4, { }, }, 24616 { 4360 /* sm3ss1 */, AArch64::SM3SS1, Convert__imm_95_0__imm_95_0__imm_95_0__imm_95_0, AMFBS_HasSM4, { }, }, 24617 { 4367 /* sm3tt1a */, AArch64::SM3TT1A, Convert__imm_95_0__Tie0_1_1__imm_95_0__imm_95_0__imm_95_0, AMFBS_HasSM4, { }, }, 24618 { 4375 /* sm3tt1b */, AArch64::SM3TT1B, Convert__imm_95_0__Tie0_1_1__imm_95_0__imm_95_0__imm_95_0, AMFBS_HasSM4, { }, }, 24619 { 4383 /* sm3tt2a */, AArch64::SM3TT2A, Convert__imm_95_0__Tie0_1_1__imm_95_0__imm_95_0__imm_95_0, AMFBS_HasSM4, { }, }, 24620 { 4391 /* sm3tt2b */, AArch64::SM3TT2B, Convert__imm_95_0__Tie0_1_1__imm_95_0__imm_95_0__imm_95_0, AMFBS_HasSM4, { }, }, 24621 { 4399 /* sm4e */, AArch64::SM4E, Convert__imm_95_0__imm_95_0__Tie0_1_1, AMFBS_HasSM4, { }, }, 24623 { 4404 /* sm4ekey */, AArch64::SM4ENCKEY, Convert__imm_95_0__imm_95_0__imm_95_0, AMFBS_HasSM4, { }, },