reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
13563   { 1043 /* fabs */, AArch64::FABSHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
13616   { 1072 /* fadd */, AArch64::FADDHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
13658   { 1101 /* fccmp */, AArch64::FCCMPHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
13661   { 1107 /* fccmpe */, AArch64::FCCMPEHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
13856   { 1156 /* fcmp */, AArch64::FCMPHrr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
13859   { 1156 /* fcmp */, AArch64::FCMPHri, Convert__Reg1_0, AMFBS_HasFullFP16, { MCK_FPR16, MCK__HASH_0, MCK__DOT_0 }, },
13862   { 1161 /* fcmpe */, AArch64::FCMPEHrr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
13865   { 1161 /* fcmpe */, AArch64::FCMPEHri, Convert__Reg1_0, AMFBS_HasFullFP16, { MCK_FPR16, MCK__HASH_0, MCK__DOT_0 }, },
13874   { 1178 /* fcsel */, AArch64::FCSELHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_CondCode }, },
13892   { 1189 /* fcvtas */, AArch64::FCVTASUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
13895   { 1189 /* fcvtas */, AArch64::FCVTASUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
13906   { 1196 /* fcvtau */, AArch64::FCVTAUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
13909   { 1196 /* fcvtau */, AArch64::FCVTAUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
13926   { 1223 /* fcvtms */, AArch64::FCVTMSUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
13929   { 1223 /* fcvtms */, AArch64::FCVTMSUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
13940   { 1230 /* fcvtmu */, AArch64::FCVTMUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
13943   { 1230 /* fcvtmu */, AArch64::FCVTMUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
13958   { 1250 /* fcvtns */, AArch64::FCVTNSUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
13961   { 1250 /* fcvtns */, AArch64::FCVTNSUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
13974   { 1264 /* fcvtnu */, AArch64::FCVTNUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
13977   { 1264 /* fcvtnu */, AArch64::FCVTNUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
13988   { 1271 /* fcvtps */, AArch64::FCVTPSUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
13991   { 1271 /* fcvtps */, AArch64::FCVTPSUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
14002   { 1278 /* fcvtpu */, AArch64::FCVTPUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
14005   { 1278 /* fcvtpu */, AArch64::FCVTPUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
14021   { 1314 /* fcvtzs */, AArch64::FCVTZSUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
14024   { 1314 /* fcvtzs */, AArch64::FCVTZSUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
14030   { 1314 /* fcvtzs */, AArch64::FCVTZSSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16, MCK_Imm1_32 }, },
14033   { 1314 /* fcvtzs */, AArch64::FCVTZSSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16, MCK_Imm1_64 }, },
14056   { 1321 /* fcvtzu */, AArch64::FCVTZUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
14059   { 1321 /* fcvtzu */, AArch64::FCVTZUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
14065   { 1321 /* fcvtzu */, AArch64::FCVTZUSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16, MCK_Imm1_32 }, },
14068   { 1321 /* fcvtzu */, AArch64::FCVTZUSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16, MCK_Imm1_64 }, },
14088   { 1328 /* fdiv */, AArch64::FDIVHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14115   { 1369 /* fmadd */, AArch64::FMADDHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14118   { 1375 /* fmax */, AArch64::FMAXHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14132   { 1380 /* fmaxnm */, AArch64::FMAXNMHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14180   { 1415 /* fmin */, AArch64::FMINHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14194   { 1420 /* fminnm */, AArch64::FMINNMHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14304   { 1519 /* fmov */, AArch64::FMOVHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14305   { 1519 /* fmov */, AArch64::FMOVWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, },
14306   { 1519 /* fmov */, AArch64::FMOVXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, },
14307   { 1519 /* fmov */, AArch64::FMOVHi, Convert__Reg1_0__FPImm1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPImm }, },
14314   { 1519 /* fmov */, AArch64::FMOVHWr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
14316   { 1519 /* fmov */, AArch64::FMOVHXr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
14321   { 1519 /* fmov */, AArch64::FMOVWHr, Convert__Reg1_0__regWZR, AMFBS_HasFullFP16, { MCK_FPR16, MCK__HASH_0, MCK__DOT_0 }, },
14343   { 1529 /* fmsub */, AArch64::FMSUBHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14346   { 1535 /* fmul */, AArch64::FMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14393   { 1546 /* fneg */, AArch64::FNEGHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14407   { 1557 /* fnmadd */, AArch64::FNMADDHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14419   { 1582 /* fnmsub */, AArch64::FNMSUBHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14422   { 1589 /* fnmul */, AArch64::FNMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
14473   { 1652 /* frinta */, AArch64::FRINTAHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14484   { 1659 /* frinti */, AArch64::FRINTIHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14495   { 1666 /* frintm */, AArch64::FRINTMHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14506   { 1673 /* frintn */, AArch64::FRINTNHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14517   { 1680 /* frintp */, AArch64::FRINTPHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14528   { 1687 /* frintx */, AArch64::FRINTXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14539   { 1694 /* frintz */, AArch64::FRINTZHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14575   { 1724 /* fsqrt */, AArch64::FSQRTHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
14586   { 1730 /* fsub */, AArch64::FSUBHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
17122   { 4110 /* scvtf */, AArch64::SCVTFUWHri, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, },
17123   { 4110 /* scvtf */, AArch64::SCVTFUXHri, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, },
17131   { 4110 /* scvtf */, AArch64::SCVTFSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32, MCK_Imm1_32 }, },
17132   { 4110 /* scvtf */, AArch64::SCVTFSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64, MCK_Imm1_64 }, },
19266   { 6325 /* ucvtf */, AArch64::UCVTFUWHri, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, },
19267   { 6325 /* ucvtf */, AArch64::UCVTFUXHri, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, },
19275   { 6325 /* ucvtf */, AArch64::UCVTFSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32, MCK_Imm1_32 }, },
19276   { 6325 /* ucvtf */, AArch64::UCVTFSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64, MCK_Imm1_64 }, },
20921   { 1043 /* fabs */, AArch64::FABSHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
20974   { 1072 /* fadd */, AArch64::FADDHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21016   { 1101 /* fccmp */, AArch64::FCCMPHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
21019   { 1107 /* fccmpe */, AArch64::FCCMPEHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
21214   { 1156 /* fcmp */, AArch64::FCMPHrr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21217   { 1156 /* fcmp */, AArch64::FCMPHri, Convert__Reg1_0, AMFBS_HasFullFP16, { MCK_FPR16, MCK__HASH_0, MCK__DOT_0 }, },
21220   { 1161 /* fcmpe */, AArch64::FCMPEHrr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21223   { 1161 /* fcmpe */, AArch64::FCMPEHri, Convert__Reg1_0, AMFBS_HasFullFP16, { MCK_FPR16, MCK__HASH_0, MCK__DOT_0 }, },
21232   { 1178 /* fcsel */, AArch64::FCSELHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_CondCode }, },
21250   { 1189 /* fcvtas */, AArch64::FCVTASUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21253   { 1189 /* fcvtas */, AArch64::FCVTASUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21264   { 1196 /* fcvtau */, AArch64::FCVTAUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21267   { 1196 /* fcvtau */, AArch64::FCVTAUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21284   { 1223 /* fcvtms */, AArch64::FCVTMSUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21287   { 1223 /* fcvtms */, AArch64::FCVTMSUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21298   { 1230 /* fcvtmu */, AArch64::FCVTMUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21301   { 1230 /* fcvtmu */, AArch64::FCVTMUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21316   { 1250 /* fcvtns */, AArch64::FCVTNSUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21319   { 1250 /* fcvtns */, AArch64::FCVTNSUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21332   { 1264 /* fcvtnu */, AArch64::FCVTNUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21335   { 1264 /* fcvtnu */, AArch64::FCVTNUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21346   { 1271 /* fcvtps */, AArch64::FCVTPSUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21349   { 1271 /* fcvtps */, AArch64::FCVTPSUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21360   { 1278 /* fcvtpu */, AArch64::FCVTPUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21363   { 1278 /* fcvtpu */, AArch64::FCVTPUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21379   { 1314 /* fcvtzs */, AArch64::FCVTZSUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21382   { 1314 /* fcvtzs */, AArch64::FCVTZSUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21393   { 1314 /* fcvtzs */, AArch64::FCVTZSSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16, MCK_Imm1_32 }, },
21396   { 1314 /* fcvtzs */, AArch64::FCVTZSSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16, MCK_Imm1_64 }, },
21414   { 1321 /* fcvtzu */, AArch64::FCVTZUUWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21417   { 1321 /* fcvtzu */, AArch64::FCVTZUUXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21428   { 1321 /* fcvtzu */, AArch64::FCVTZUSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16, MCK_Imm1_32 }, },
21431   { 1321 /* fcvtzu */, AArch64::FCVTZUSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16, MCK_Imm1_64 }, },
21446   { 1328 /* fdiv */, AArch64::FDIVHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21473   { 1369 /* fmadd */, AArch64::FMADDHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21476   { 1375 /* fmax */, AArch64::FMAXHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21490   { 1380 /* fmaxnm */, AArch64::FMAXNMHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21538   { 1415 /* fmin */, AArch64::FMINHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21552   { 1420 /* fminnm */, AArch64::FMINNMHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21662   { 1519 /* fmov */, AArch64::FMOVHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21663   { 1519 /* fmov */, AArch64::FMOVWHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, },
21664   { 1519 /* fmov */, AArch64::FMOVXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, },
21665   { 1519 /* fmov */, AArch64::FMOVHi, Convert__Reg1_0__FPImm1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPImm }, },
21672   { 1519 /* fmov */, AArch64::FMOVHWr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, },
21674   { 1519 /* fmov */, AArch64::FMOVHXr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, },
21684   { 1519 /* fmov */, AArch64::FMOVWHr, Convert__Reg1_0__regWZR, AMFBS_HasFullFP16, { MCK_FPR16, MCK__HASH_0, MCK__DOT_0 }, },
21701   { 1529 /* fmsub */, AArch64::FMSUBHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21704   { 1535 /* fmul */, AArch64::FMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21751   { 1546 /* fneg */, AArch64::FNEGHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21765   { 1557 /* fnmadd */, AArch64::FNMADDHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21777   { 1582 /* fnmsub */, AArch64::FNMSUBHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21780   { 1589 /* fnmul */, AArch64::FNMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
21831   { 1652 /* frinta */, AArch64::FRINTAHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21842   { 1659 /* frinti */, AArch64::FRINTIHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21853   { 1666 /* frintm */, AArch64::FRINTMHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21864   { 1673 /* frintn */, AArch64::FRINTNHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21875   { 1680 /* frintp */, AArch64::FRINTPHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21886   { 1687 /* frintx */, AArch64::FRINTXHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21897   { 1694 /* frintz */, AArch64::FRINTZHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21933   { 1724 /* fsqrt */, AArch64::FSQRTHr, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, },
21944   { 1730 /* fsub */, AArch64::FSUBHrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
24480   { 4110 /* scvtf */, AArch64::SCVTFUWHri, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, },
24481   { 4110 /* scvtf */, AArch64::SCVTFUXHri, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, },
24494   { 4110 /* scvtf */, AArch64::SCVTFSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32, MCK_Imm1_32 }, },
24495   { 4110 /* scvtf */, AArch64::SCVTFSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64, MCK_Imm1_64 }, },
26624   { 6325 /* ucvtf */, AArch64::UCVTFUWHri, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, },
26625   { 6325 /* ucvtf */, AArch64::UCVTFUXHri, Convert__Reg1_0__Reg1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, },
26638   { 6325 /* ucvtf */, AArch64::UCVTFSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR32, MCK_Imm1_32 }, },
26639   { 6325 /* ucvtf */, AArch64::UCVTFSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, AMFBS_HasFullFP16, { MCK_FPR16, MCK_GPR64, MCK_Imm1_64 }, },
30370   { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasFullFP16 },
30371   { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasFullFP16 },